Turya Bose
Bis 2019, Junior Manager, Training and Development, Manikaran Power Limited
Student, Electrical Engineering, Computer Engineering and Information Technology, RWTH Aachen University
Aachen, Deutschland
Über mich
Computer Engineering student with 1+ years of experience in the power industry. I am currently looking for an internship in the embedded development space or hardware design. Technical Skills & Tools: C, C++, Verilog, System C, Python, Matlab. Here are a few projects that I have worked on: • I have experience working with the De0 Nano FPGA development board using Intel Quartus software in my FPGA lab. All the coding was done in Verilog. • During my seminar, I worked on compression techniques for neuromorphic architectures. I researched on various techniques like tensor decomposition, data quantization and network sparsification and how these affect CNN and RNN models. Currently I am very interested in the development of FPGAs and ASICs and taking subjects such as embedded systems, DSP: Design and methodologies, Electronic Design and Automation has helped me in this regard. Along with this, I am also interested in the deployment of machine learning models on embedded devices.
Werdegang
Berufserfahrung von Turya Bose
1 Jahr und 1 Monat, Juli 2018 - Juli 2019
Junior Manager, Training and Development
Manikaran Power Limited
1) Worked with a multicultural team on a project which used time series modelling to predict the power requirements of an area based on historical data, weather, population, etc. 2) Researched about the power trading market of India and other countries and offered solutions and training to the other employees about the changing regulations.
Ausbildung von Turya Bose
Bis heute 3 Jahre und 8 Monate, seit Okt. 2020
Electrical Engineering, Computer Engineering and Information Technology
RWTH Aachen University
Subjects taken: Special Operating System, VLSI Design, Computer Arithmetic, Artificial Intelligence, Embedded Systems, DSP: Methodologies and Tools, Electronic Design and Automation, Advanced Compiler Engineering. Lab: FPGA Development with Verilog. Seminar: Compression algorithms for Neuromorphic architecture.
Sprachen
Bengali
Muttersprache
Englisch
Muttersprache
Hindi
Fließend
Deutsch
Gut